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Home > Archives > Vol.7, No.1

Vol.7, No.1






High Reliability and Low Switching Loss Dual RESURF 40 V N-LDMOS Transistor with Grounded Multi-Step Field Plate

Jun-ichi Matsuda, Anna Kuwana, and Haruo Kobayashi

Journal of Technology and Social Science, Vol.7, No.1, pp.1-12, 2023.

Abstract: This paper proposes a high reliability and low switching loss dual RESURF 0.18 m CMOS compatible process 40 V N-LDMOS transistor with a grounded multi-step (two or three-step) field plate, used as integrated switching devices of power supplies for automotive applications. Device simulation verified that the electric field along the interface near the gate-side drift region edge for the two-step and the three-step devices is 67% and 46% of a conventional LDMOS transistor with a flat field plate connecting to the gate, respectively. This result indicates that the proposed devices have much higher hot carrier endurance and a large SOA by suppressing the current expansion at a high drain current. The power FOM deteriorates in the order of the conventional device, the two-step device, and the three-step device, but the difference in the FOM is very slight. The switching loss of the proposed device is about 50 % of the conventional one. The proposed device is suitable for automotive applications used in harsh environments. We can choose the two or three-step structure depending on the required specification and the process cost.

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